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Control-Layer Interpretation of Reactive Power Recovery Limits in EMT-RMS Model Benchmarking of Inverter-Based Resources
arXiv eess.SY0 views
arXiv:2610.41221v1 Announce Type: new Abstract: EMT--RMS benchmarking is widely used to verify cross-platform consistency of inverter-based resource (IBR) dynamic models. This paper examines a 200 MW anonymized IBR represented in PSCAD and PSS/E. The EMT model separates inverter electrical capability from a plant-level power plant controller (PPC) recovery target, whereas the RMS model represents these functions through REECC and REPCA parameters. Directly assigning the PPC target of $\pm 0.2764$ pu to REPCA hard reactive limits is initialization-inconsistent at the original lagging operating point because the initial reactive command is 0.396273 pu. A second, near-unity-power-factor operating point initializes successfully with the same diagnostic limit, demonstrating that the conflict is operating-point dependent. Using the non-conflicting capability mapping removes the original hard-limit conflict, but the benchmark still shows 18.5--30.2 MVAr post-event POI reactive-power differences from PSCAD. A one-at-a-time REPCA $K_c$ sensitivity under matched benchmark initial conditions further shows that RMS recovery is parameter- and limit-dependent: at $K_c=0.05$ and 0.10 the aggregate machine reactive output reaches the configured capability bounds, while $K_c=0.15$ moves VDOWN, VUP, and HVRT off those bounds and changes their settled POI reactive power by 8.94, 18.00, and 3.17 MVAr, respectively. Machine-to-POI accounting further shows why machine-side saturation need not reproduce the POI-level PPC recovery magnitude. The results distinguish initialization feasibility from recovery equivalence and provide a control-layer diagnostic workflow beyond waveform comparison.
Source:https://arxiv.org/abs/2610.41221PreviousEMT Assessment of SCR and X/R Effects on Current-Priority-Dependent LVRT Response of a Grid-Following BESSNextDelta-Seeker: Closed-Loop Generative Search for Novel Circuit Design Discovery
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