AI & ML
Rethinking Sparse Formats for RISC-V: A Hierarchical Approach to High-Performance SpMV
arXiv cs.DC0 views
arXiv:2609.11352v2 Announce Type: replace Abstract: The sparse matrix-vector multiplication (SpMV) algorithm is a fundamental computational kernel of linear algebra and serves as a building block for numerous applications, primarily iterative solvers for systems of linear equations used in scientific and engineering simulations. This paper compares vectorized implementations of the SpMV algorithm across eight established sparse matrix storage formats and proposes a novel modification of the CSR format, Hierarchical CSR (HCSR), which enhances SpMV performance on RISC-V processors. Our SpMV implementations utilize RVV 1.0 intrinsics and are publicly available as an open-source C++ library named RVVLASparse. Computational experiments conducted on SpacemiT K1 and K3 RISC-V boards demonstrate that the proposed HCSR format achieves the shortest execution time among all considered formats across a broad class of sparse matrices. HCSR outperforms the best CSR implementation on 8 cores, yielding an average speedup for double precision of 19% on K1 (13% on K3) and for single precision of 36% on K1 (34% on K3).
Source:https://arxiv.org/abs/2609.11352PreviousKonflux: Optimized Function Fusion for Serverless ApplicationsNextA Self-Defining Operator for Distributed Applications
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